-------------------------------- VIDEO V 0.4 --------------------------------
-----------------------------------------------------------------------------
--------- routines to access the Video-Blaster and compatible cards ---------
-------------------------------------- (C) 1994/95 Bernhard Schwall ---------

Contents:

1.  Introdution
2.  Compilation of VIDEO
2.1  under Linux
2.2  under DOS
3.  Starting VIDEO
4.  VIDEO_BW under Linux
5.  Where I got my information from
6.  Supported video cards
7.  Supported chipset
8.  Memory layout
9.  Possible framerates
10. Tables
... ...
42. Tables
43. Author

1. Introdution

VIDEO is a program for using the VIDEO-BLASTER and videocards with the
C&T and Philips chipset, as ROMBO Media Pro+ under Linux and DOS without 
any driver.

!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! Caution !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
You use of this program on your own risk. There is no guarantee that this
program works correct and that it could not damage your Videocard or monitor.
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

This program comes without any warranty. You are using it at your own risk.
The program is released into the public domain. You may use, modify, copy and
distribute this without restrictions but without charging money for it.


2. Complation of VIDEO

To compile the program do the following steps:
Edit the file v_access.h if you want to enable the audio mixer for 
Media Pro Plus or SoundBlaster 16.

Uncomment the line 
#define MEDIA_PRO_PLUS_MIXER
if you have a Rombo Media Pro Plus and want to use it's audio mixer.

Uncomment the line
#define SB16_MIXER
if you have a Sound Blaster 16 and wand to use it's audio mixer.


2.1 Compilation under Linux

If you don't have installed the vgalib or svgalib you have to do this before
compiling VIDEO. Then type make and the program should be made. If you get
into trouble edit the makefile and delete line 4 and 6. You have to compile
the program as root or you do not get permissions to the ports. After 
compilization you can start the program as non-root but be shure you only
start it once. There is no test for multiple execution.
If you want to install VIDEO into a different diercory you have to tell the
program where to find it's config file. Therefore you have to edit the file
vid_main.c. At the beginning of the main()-routine you find the lines

#ifdef linux
  strcpy(Name, "./");
#else

Change this line to tell the program where to find you VIDEO.CFG. E.g. if you
have you VIDEO.CFG in the directory /usr/local/bin/ change it to

#ifdef linux
  strcpy(Name, "/usr/local/bin/");
#else

Now rebuild the program and install it to the directory you want. Be shure to
copy the file VIDEO.CFG to the given dirctory.


2.2 Compilation under DOS

You have to use the DJGPP (tested with version 2.5.7). You should also use
GNU's make. Otherwise you have to modify the makefile. Type make and the
program should be compiled. If you get an errormessage you have to edit the
makefile. Delete the first 6 lines of the makefile and there should be no
problem to compile the program. Now edit the file VIDEO.CFG (see Section 3) 
and start the program.
If you want to install the program into another directory copy VIDEO.EXE and
VIDEO.CFG into the same directory. If you want to move the config file into
a different directory you have to edit the file vid_main.c and set the path
for VIDEO.CFG in the function "main()".
With some modifications it is possible to compile the routines with Borland
C++, but then you can't use the memory-access or you have to rewrite it
completely. I've used this routines under Windows with Borland Pascal 7.0,
using DPMI for memory-access.


3. Starting VIDEO

To start the Program first edit the file VIDEO.CFG. If you get an error-
message while starting the program you either typed a unknown name or
you've added blanks to a line. Delete them and try again. Lines beginning
with a '#' are ignored. All numbers must be given in decimal values. Ignore 
the lines not usable for your card (especially the 'Volume'-setting).
Especially you must set the port-address of your videocard, the memoryaddress
and the H- and V-sync of your VGA-card for the standard VGA-mode 0x12, 
640x480x16. The settings are the same as used by the original software under
Windows. So you can use this settings if the default settings would'nt give
you a good picture.
The volume setting is only usefull if you have a ROMBO Media Pro Plus or if
your audio is connected to the line-in of a SB16.



After editing VIDEO.CFG you can start the program by typing 'VIDEO'. The
following command line options are available:
-d   delete the memory of the videocard while initialisation.
     This should only be used if you have less then 16 MB ram installed.
     Otherwise you meight crash your system.

If you get the program start and see the live-video you can press the 
following keys:
'2'     : display the video with 680x512 (only usefull for PAL)
          this is the maximum resolution the VB can handle. Therefore a new
          videomode is created to show the video at fullscreen. If you don't
          have a multi sync monitor don't use this function.
'3'     : display the video with 640x480
'4'     : display the video with 368x286 (half size PAL)
'5'     : display the video with 320x240 (half size NTSC, I think)
's'     : freeze or unfreeze the video
'l','+' : louder (volume on Media Pro+ and SB16)
'q','-' : quieter (volume on Media Pro+ and SB16)
'm'     : switch sound off and on (on Media Pro+ and SB16)
'w'     : save the picture in the actually shown resolution as TARGA-file
          with the name picXXX.tga, where XXX is a number between 0 and 999.
          The number is selected so that no file will be deleted, even if you
          start the program a second time having previor saved pics in the
          directory.
'g'     : read saved pics with the name picXXX.tga and display them in the 
          original size. XXX is a number between 0 and 999. The pics are
          loaded in revers order, first the picture with the highest number,
          then the picture with a lower number, and so on.
'h'     : change the HSync
'v'     : change the VSync
'b'     : activate some filter for displaying the video
'n'     : set the original filter.
'ESC'   : leave the program

About the save and load options:
Use this options only if you have less then 16 MB ram installed and set up 
your config file correctly. Otherwise you meight crash your system.

About the pictures:
If you want to show them under Linux with XV you will need to convert them
into another format. You can use either tgatoppm to convert them into PPM-
format or cjpeg to convert them into JPG-format.

4. VIDEO_BW

If you have no problems running VIDEO (especially with saving and loading)
you could try to compile VIDEO_BW. VIDEO_BW is a demonstration program on how
to implement a (greyscale) software video (actually only under Linux). To
complie it type 'make video_bw'. While running VIDEO_BW you can use the keys
'2', '3' and '4' for scaling the video. The keys for audio control (if
complied in v_access.o) are available. If you find the video stopping
sometimes you can adjust the framerate within the main routine of vid_bw.c
(an example for 240x180 is given). 
The main reason for this  program was to find out the maximum framerate the 
VB is possible to grab and (if someone would implement it) to display the 
video using X. As the display chip of the VB is not used it is possible to
display the greyscale live video with a resolution of 1024x768 (or even higher
I think).
With a program similar to VIDEO_BW it's possible to grab color live video to
disk and convert it into a MPEG video file. To do this in reasonable size and
speed (e.g. 240x180 with 25 fps) you must have a VCR with a high quality
slowmotion. I've done this and was impressed about the goot results. Of course
you nead a lot of disk space and time for the conversion.


5. Where I got my information from

All information I have is taken from the german computer magazine TOOL 10/91
to 02/92. This was a hardware project with a description of a video card
similar the VB created by Chips & Technologies. Unfortunately the magazine
stoped publishing before the project was ended so I don't have the complete
project. All usefull (and available) information about programming of the VB
is included in the my routines. The routines published are written by C&T in
assembler. I've converted them into C to use them under Linux. Because
Creative Labs doesn't give any information about the VB I can't adapt my
routines to the new VBs or even add the possibility of accessing the memory
of the VB if you have installed more than 8MB ram in your PC.


6. Supported video cards

Cards which are reported to run with my software:

ROMBO Media Pro Plus (from Dec. 1992)
TV Movie Blaster (CPS)

The rouitnes should run with the original VB from 1992. If you have a card 
working with my routines please let me know (with exact name and date of 
purchase if possible).

If you have more information about the VB please contact me so I can improve
the routines.

Up to now there seems to be some problems with VBs shipped in the USA. Some 
user have told me that they can see the live video but they have problems
saving the picture even if they only have 8MB main memory.


7. Supported chipset

The VB is mainly controlled by three chips (of course there are more chips
but these are the user programmable ones):

Philips: SAA9051, TDA4680: decode and digitize the analog video signal.

For the configuration of the SAA9051 see section 12-42. It handles the
decoding of the video signal.
To change the confiuration of the SAA9051 you can use the function
V_wr_i2c(0x8a, Index, Value);
The standard configuration can be found in the routine V_Initialize in
Config2[0] .. Config2[11].

Sorry, but I don't have any information about the TDA4680. It handles the
color setup of the decoding. 
To change it's configuration you could use the function
V_wr_i2c(0x88, Index, Value);
The standard configuration can be found in the routines V_Initialize in
Config2[12] .. Config2[27].

Chips & Technologies: 82C9001A used to display and scale the video.

For the configuration of the 82C9001A see section 11. To change the
configuration of the 82C9001A you can either use the functions provided by
V_ACCESS.C or use the function
V_SetRegister(Index, Value).
To read the setup of the 82C9001A you can use the function
V_GetRegister(Index).
The standard configuration can be found in the routine V_Initialize. This
standard setup is changed in V_Initialize acording to the configuration file
VIDEO.CFG.


8. Memory layout

The VB has 768 KB on board which are mapped onto one MB on the ISA bus. 
That's the reason why you can't access the memory of the VB if you have
installed 16MB ram. As the ISA bus only has 24 address bits it's not possible
to map the memory to a higher address than MB 15. There seames to be some
boards which are able to 'hide' one MB of the main memory (e.g. some of the
ASUS boards). With such a board it should be possible to have 15 MB main-
memory and use the 16th MB for the VB. I was told that this should run under
DOS. For Linux you have to patch the kernel to tell it that there is only
15 MB ram. I didn't do this and even don't know if this is possible.

The baseaddress (calles BA) is set with the function V_SetVideoAddress.
Each scanline is 2048 byte long (where only the first 1536 byte are real
memory). There is a maximum of 512 scanlines in the memory. The picture is
scaled before it is digitized into the memory so you will find the picture
in the size set by V_SetWindowSize. Each line has the following layout:

Four pixels are packed together in 8 byte:

(byte) B7 B6 B5 B4 B3 B2 B1 B0   bits 7-0 in the memory

(1)    Y6 Y5 Y4 Y3 Y2 Y1 Y0 **   Y value pixel 1
(2)    U7 U6 V7 V6 ** ** ** **
(3)    Y6 Y5 Y4 Y3 Y2 Y1 Y0 **   Y value pixel 2
(4)    U5 U4 V5 V4 ** ** ** **
(5)    Y6 Y5 Y4 Y3 Y2 Y1 Y0 **   Y value pixel 3
(6)    U3 U2 V3 V2 ** ** ** **
(7)    Y6 Y5 Y4 Y3 Y2 Y1 Y0 **   Y value pixel 4
(8)    U1 U0 V1 V0 ** ** ** **

The U and V values must be interpreted as bits 0-7 of a _SIGNED_ char.
The U and V values are used for all four Y values of the block. So you have
a color depth of 4:1:1.

To convert the YUV values to RGB you can use the following routines:

input:
  unsigned char U,V    // the U and V values of the block
    and
  int Y[4]             // the Y values of the block
    
output:
  int r[4],g[4],b[4]   // the RGB values of the block

routine:

  int u,v,z;

  u = (U * 226) / 127;
  v = (V * 179) / 127;

  for (z=0; z<4; z++){
    if ((r[z]=y[z]+v) < 0) r[z] = 0;
    else
      if (r[z]>255) r[z] = 255;
    if ((b[z]=y[z]+u) < 0) b[z] = 0;
    else
      if (b[z]>255) b[z] = 255;
    g[z] = ((y[z]*436L) >> 8) - ((r*130U) >> 8) - ((b*50U) >> 8);
    if (g[z]<0) g[z] = 0;
      else
        if (g[z]>255) g[z] = 255;
  }

To use only the black and white image of course you don't have to combine the
U and V values and convert them into RGB. You only have to grab the Y values.
See the file vid_bw for example. The VB will capture the video into it's
memory as long as it is activated (V_Initialize is called). This is even done
if the live overlay is not active (V_DisableVideo is called). So it should be
possible to make a 'software' video under X in every resolution.


9. Possible framerates

The memory is only accessable if the video is freezed. If you want to get the
maximum framerate (if grabbing motion pictures) you should turn off the live
video display. With this I get the following frame rates when making a grey
'software' video (on a 486DX33):
320x240: 7.5 frames / sec
240x180: 10  frames / sec
160x120: 25  frames / sec
If you try to grab more then the maximum framerate the VB hasn't enough time
to digitize the video and you will grab the old picture. For testing the speed
you could use video_bw if you are using Linux.

10. Tables

Thanks to Casey Ryder for converting my original scan into an ASCII file. So 
it's much easier to read and use it.


11. The 48 Control registers of the 82C9001A

Register 	Group		Name			Index	R/W-Access
----------------------------------------------------------------------------
RX		--		Index Register		--	RW
--------------------------------------------------------------------
R00		CPU-Interface	R/W-Address		0x00	RW
R01		CPU-Interface	Memory Access		0x01	RW
R06		CPU-Interface	Memory-Base Address	0x06	RW
R07		CPU-Interface	Luminance Mask		0x07	RW
R08		CPU-Interface	Chrominance Mask	0x08	RW
R09		CPU-Interface	Interrupt Mask		0x09	RW
--------------------------------------------------------------------
R10		Gen.Purp. IO	GeneralPurpose IO 0	0x10	EXT
R11		Gen.Purp. IO	GeneralPurpose IO 1	0x11	EXT
R12		Gen.Purp. IO	GeneralPurpose IO 2	0x12	EXT
R13		Gen.Purp. IO	GeneralPurpose IO 3 	0x13	EXT
R18		Gen.Purp. IO	GeneralPurpose IO Ctrl	0x18	RW
--------------------------------------------------------------------
R20		Video		Video Acquisition mode	0x20	RW
R21		Video		Window Control		0x21	RW
R22		Video		Window X-Start low	0x22	RW
R23		Video		Window X-Start high	0x23	RW
R24		Video		Window Y-Start low	0x24	RW
R25		Video		Window Y-Start high	0x25	RW
R26		Video		Window X-End low	0x26	RW
R27		Video		Window X-End high	0x27	RW
R28		Video		Window Y-End low	0x28	RW
R29		Video		Window Y-End high 	0x29	RW
R2a		Video		Acquisition Adr. low	0x2a	RW
R2b		Video	 	Acquisition Adr. mid	0x2b	RW
R2c		Video		Acquisition Adr. high	0x2c	RW
R2d		Video		Horizontal Scale	0x2d	RW
R2e		Video		Vertical Scale		0x2e	RW
R2f		Video		Scaling Field Adj.	0x2f	RW
R30		Video		Input Video Start	0x30	RW
R38		Video		Scaling Control		0x38	RW
-------------------------------------------------------------------
R40		Display		Display Area Control	0x40	RW
R41		Display		Window X-Start low	0x41	RW
R42		Display		Window X-Start high	0x42	RW
R43		Display		Window Y-Start low	0x43	RW
R44		Display		Window Y-Start high	0x44	RW
R45		Display		Window X-End low	0x45	RW
R46		Display		Window X-End high	0x46	RW
R47		Display		Window Y-End low	0x47	RW
R48		Display		Window Y-End high	0x48	RW
R49		Display		X-Panning low 	 	0x49	RW
R4a		Display		X-Panning high 		0x4a	RW
R4b		Display		X-,Y-Panning high 	0x4b	RW
R4c		Display		MSB Column & Row Start 	0x4c	RW
R4d		Display		Sync Polarity/Zoom 	0x4d	RW
R4e		Display		Color Compare 		0x4e	RW
R4f		Display		Color Mask 		0x4f	RW
R50		Display		Interlace-out Control 	0x50	RW
--------------------------------------------------------------------
RFF		Misc.		Global Enable/Version	0xff	RW
--------------------------------------------------------------------


12. Configuration registers of the Multi-standard decoder SAA9051

Function           Subaddress    DataByte
			         D7    D6    D5    D4    D3    D2    D1    D0
--------------------------------------------------------------------------------
Increment Delay IDEL  	   00	 A07   A06   A05   A04   A03   A02   A01   A00
HSY start time		   01	 A17   A16   A15   A14   A03   A12   A11   A10
HSY stop time		   02	 A27   A26   A25   A24   A23   A22   A21   A20
HC start time		   03	 A37   A36   A35   434   A33   A32   A31   A30
HC stop time		   04	 A47   A46   A45   A44   A43   A42   A41   A40
HS start time (after PHI1) 05	 A57   A56   A55   A54   A53   A52   A51   A50
Horizontal Peaking	   06	 BY    PF    BP2   BP1   COR2  COR1  AP2   AP1
Hue control		   07	 A77   A76   A75   A74   A73   A72   A71   A70
Control 1		   08	 HPLL  FS    VTR   CO    ALT   YPN   CCFR1 CCFR0
Control 2		   09	 VNL   OEY   OEC   X     CI    AFCC  SS1   SS0
Control 3		   0a	 SYC   CT    YC    SS3   SS2   YDL2  YDL1  YDL0
SECAM delay compensation   0b	 X     SCDC6 SCDC5 SCDC4 SCDC3 SCDC3 SCDC1 SCDC0 
Reserved	 	0c-0f	 X     X     X     X     X     X     X     X
--------------------------------------------------------------------------------


13. Parameters for IDEL and the resulting timing  (CC=central counter)

Decimal        Delay Time                       Control Bits
Multiplier    (Step size= 2/13.5 MHz=148ns)     A07 A06 A05 A04 A03 A02 A01 A00
--------------------------------------------------------------------------------
-1 to -110    -148 ns (minimal value)            1   1   1   1   1   1   1   1
-1 to -110    -16.3 us (outside avail. range)    1   0   0   1   0   0   1   0
-111 to -214  -16.44 us                          1   0   0   1   0   0   0   1
-111 to -214  -31.7 us (max. val. if FS=1)       0   0   1   0   1   0   1   0
-215          -31.85 us (outside CC if FS=1)         0       0       1       0 
-216          -32 us (max. val. if FS=0)         0   0   1   0   1   0   0   0
-217 to -256  -32.148 us (outside CC if FS=0)        0       0       1       0
-217 to -256  -37.9 us (outside CC)              0   0   0   0   0   0   0   0
--------------------------------------------------------------------------------


14. Start Time control

Decimal       Delay Time                     Control Bits
Multiplier   (Step size= 1/13.5 MHz= 74ns)    A17 A16 A15 A14 A13 A12 A11 A10
--------------------------------------------------------------------------------
+191 to +1   -14.2 us (max. negative val.)     1   0   1   1   1   1   1   1
+191 to +1   -0.074 us                         0   0   0   0   0   0   0   1
0            0 us reference point              0   0   0   0   0   0   0   0
-1 to -64    -0.074 us                         1   1   1   1   1   1   1   1
-1 to -64    +4.7 us (max. positive val.)      1   1   0   0   0   0   0   0
--------------------------------------------------------------------------------


15. HSY signal stop-time control

Decimal       Delay Time                     Control Bits
Multiplier   (Step size= 1/13.5 MHz= 74ns)    A27 A26 A25 A24 A23 A22 A21 A20
--------------------------------------------------------------------------------
+191 to +1   -14.2 us (max. positive val.)     1   0   1   1   1   1   1   1
+191 to +1   -0.074 us                         0   0   0   0   0   0   0   1
0            0 us reference point              0   0   0   0   0   0   0   0 
-1 to -64    +0.074 us                         1   1   1   1   1   1   1   1 
-1 to -64    +4.7 us (max. positive val.)      1   1   0   0   0   0   0   0
--------------------------------------------------------------------------------


16. Start time range

Decimal       Delay Time                     Control Bits
Multiplier   (Step size= 1/13.5 MHz= 74ns)    A37 A36 A35 A34 A33 A32 A31 A30
--------------------------------------------------------------------------------
+127 to +1  -9.4 us (max. negative val.)       0   1   1   1   1   1   1   1
+127 to +1  -0.074 us                          0   0   0   0   0   0   0   1
0            0 us reference point              0   0   0   0   0   0   0   0
-1 to -128  +0.074 us                          1   1   1   1   1   1   1   1
-1 to -128  +9.5 us (max. positive val.)       1   0   0   0   0   0   0   0
--------------------------------------------------------------------------------


17. HC sync. stop time control

Decimal       Delay Time                     Control Bits
Multiplier   (Step size= 1/13.5 MHz= 74ns)    A47 A46 A45 A44 A43 A42 A41 A40
--------------------------------------------------------------------------------
+127 to +1  -9.4 us (max. negative val.)       0   1   1   1   1   1   1   1
+127 to +1  -0.074 us                          0   0   0   0   0   0   0   1
 0           0 us reference point              0   0   0   0   0   0   0   0
-1 to -128  +0.074 us                          1   1   1   1   1   1   1   1
-1 to -128  +9.5 us (max. positive val.)       1   0   0   0   0   0   0   0
--------------------------------------------------------------------------------


18. Start of HS relative to PHI1 clock signal (CC=central counter)

Decimal       Delay Time                     Control Bits
Multiplier   (Step size= 4/13.5 MHz= 296ns)   A57 A56 A55 A54 A53 A52 A51 A50
--------------------------------------------------------------------------------
+127 to +109  Forbidden; outside CC range          0       1        1      1
+127 to +109  Forbidden; outside CC range          0       1        1      0
+108 to +1    -32 us (max. neg. val.)          0   1   1   0   1   1   0   0
+108 to +1    -0.296 us                        0   0   0   0   0   0   0   1
0             0 us reference point             0   0   0   0   0   0   0   0
-1 to -107    +0.296 us                        1   1   1   1   1   1   1   1
-1 to -107    +31.7 us (max. pos. val.)        1   0   0   1   0   1   0   1
-108 to -128  Forbidden; outside CC range          1       0       0       1
-108 to -128  Forbidden; outside CC range          1       0       0       0
--------------------------------------------------------------------------------


19. .. and stop time; both depend on the FS-flag in register 0x08

Decimal       Delay Time                     Control Bits
Multiplier   (Step size= 4/13.5 MHz= 296ns)   A57 A56 A55 A54 A53 A52 A51 A50
--------------------------------------------------------------------------------
+127 to +107  Forbidden; outside CC range          0       1       1       1
+127 to +107  Forbidden; outside CC range          0       1       1       0
+106 to +1    -31.8 us (max. neg. val.)        0   1   1   0   1   0   1   0
+106 to +1    -0.294 us                        0   0   0   0   0   0   0   1
0             0 us reference point             0   0   0   0   0   0   0   0
-1 to -107    +0.294 us                        1   1   1   1   1   1   1   1
-1 to -107    +31.5 us (max. pos. val.)        1   0   0   1   0   1   0   1
-108 to -128  Forbidden; outside CC range          1       0       0       1
-108 to -128  Forbidden; outside CC range          1       0       0       0
--------------------------------------------------------------------------------


20. Switch between PAL- and NTSC color-carrier-frequency

PAL (4.43 MHz)          Control Bits	BY = 0   	YPN = 0
NTSC (3.58 MHz)         Control Bits	BY = 0   	YPN = 1
Bypass                  Control Bits	BY = 1   	YPN = X


21. Prefilter control      

ON                      Control Bit 	PF = 0
OFF                     Control Bit 	PF = 1


22. Centre frequency (type) of BandPass Filter

type 1 (4.1 MHz)        Control Bits	B2 = 0   	BP1 = 0
type 2 (3.8 MHz)        Control Bits	B2 = 0   	BP1 = 1
type 3 (2.6 MHz)        Control Bits	B2 = 1   	BP1 = 0
type 4 (2.9 MHz)        Control Bits	B2 = 1   	BP1 = 1


23. Set Squelch/Noise suppression threshold

coring off    		  Control Bits	COR2 = 0	COR1 = 0
coring on (-8 to 7 LSB)   Control Bits	COR2 = 0	COR1 = 1
coring on (-16 to 15 LSB) Control Bits	COR2 = 1	COR1 = 0
coring on (-32 to 31 LSB) Control Bits	COR2 = 1	COR1 = 1
--------------------------------------------------------------------------------


24. Set HUE Phase (only for NTSC)

HUE Phase (deg.)        Control Bits	A77 A76 A75 A74 A73 A72 A71 A70
-------------------------------------------------------------------------
+178.6 to 0           			 1   1   1   1   1   1   1   1
0                    			 1   0   0   0   0   0   0   0
0 to -180            			 0   0   0   0   0   0   0   0
--------------------------------------------------------------------------------


25. PLL control through Register 0x08

Horizontal clock PLL open, Hor. Freq. Fixed	Control Bit	HPLL = 1
Horizontal clock PLL closed                	Control Bit	HPLL = 0


26. Number of lines per full-frame

60 Hz; 525 lines 				Control Bit 	FS = 1
50 Hz; 625 lines 				Control Bit 	FS = 0


27. Switch between TV- and VTR usage

VTR mode 					Control Bit	VTR = 1
TV  mode 					Control Bit	VTR = 0


28. Switch color information On/Off in register with index 0x08

Color ON					Control Bit	CO = 1
Color OFF					Control Bit	CO = 0


29. Select video standard

alternate mode (PAL)				Control Bit	ALT = 1
non-alternate mode (NTSC)			Control Bit	ALT = 0


30. Set color carrier Frequency (Chrominance) ....

3.58 MHz					Control Bit 	YPN = 1
4.43 MHz 					Control Bit	YPN = 0


31. ... whose place also depends on the Video Standard set in register 0x08

 Color Carrier Frequency       		 	Control Bits  CCFR1   CCFR0
-----------------------------------------------------------------------------
4 433 618.85 Hz (PAL-B, G, H, 1; NTSC 4.43)	   	  	0  	0
3 575 611.49 Hz (PAL-M)						0  	1	
3 582 056.25 Hz (PAL-N)						1	0
3 579 545 Hz (NTSC-M)						1	1
--------------------------------------------------------------------------------


32. Use of the VNL sync. signal

VNL active					Control Bit	VNL = 1
VNL bypassed					Control Bit	VNL = 0


33. Control of SAA9051 Data output (Z-state = High-impendance)

outputs D1..D7, #BL, HS, VS active		Control Bit	OEY = 1
outputs D1..D7, #BL, HS, VS Z-state		Control Bit	OEY = 0


34. Control of the UV0..Uv3 connections

Function					Control Bit	 OEC	
-------------------------------------------------------------------------------
UV0..UV3 active; if CD=1, chrominacne output; CD=0, no signal     1
outputs UV0..UV3 HIGH-impendance Z-state		          0
--------------------------------------------------------------------------------


35. Color control (CL=1 -> CO controls color; CL=0 & CO=1 -> CD controls color)

Color (On/Off)					Control Bits	CL   CO   CD
------------------------------------------------------------------------------
color OFF							1    0    X
color ON							1    1    X
color OFF							0    0    X
color OFF							0    1    0
color ON							0    1    1
--------------------------------------------------------------------------------


36. Switch between High/Low AFCC spike ...

output AFCC = High				Control Bit	AFCC = 1
output AFCC = Low				Control Bit	AFCC = 0


37. .. and SS0..SS3

output SS0-SS3 = High				Control Bits	SS0..3 = 1
output SS0-SS3 = Low				Control Bits	SS0..3 = 0


38. Enable/Disable HSY and HC signals

HSY and HC output pulses disabled		Control Bit 	SYC = 1
HSY and HC output pulses enabled		Control Bit	SYC = 0


39. TriState control of the CVBS signal

CVBS Active					Control Bit	CT = 1
CVBS HIGH-Impedance Z-State			Control Bit	CT = 0


40. FBAS Input selection

Y/C seperate inputs				Control Bit	YC = 1
CVBS Input					Control Bit	YC = 0


41. Luminance processing Delay

Delay (N=)			Control Bits 	YDL2	YDL1	YDL0
------------------------------------------------------------------------------
   0						 0	 0 	 0
  +1 						 0	 0	 1
  +2						 0	 1 	 0
  +3						 0	 1	 1
  -4						 1	 0	 0
  -3						 1	 0	 1
  -2						 1	 1	 0
  -1						 1	 1	 1
--------------------------------------------------------------------------------


42. Chrominance Delay settings for the SECAM Standard

Programmabe Delay      Control Bits   SCDC6 SCDC5 SCDC4 SCDC3 SCDC2 SCDC1 SCDC0
--------------------------------------------------------------------------------
  0					0     0     0     0     0     0     0
  1					0     0     0     0     0     0     1
  2					0     0     0     0     0     1     0
  .                                     .     .     .     .     .     .     .
  4					0     0     0     0     1     0     0
  .                                     .     .     .     .     .     .     .
  8					0     0     0     1     0     0     0
  .                                     .     .     .     .     .     .     .
  16					0     0     1     0     0     0     0
  .                                     .     .     .     .     .     .     .
  32					0     1     0     0     0     0     0
  .                                     .     .     .     .     .     .     .
  63					0     1     1     1     1     1     1
  64					1     1     1     0     0     0     0
  65					1     1     1     0     0     0     1
  .                                     .     .     .     .     .     .     .
  79					1     1     1     1     1     1     1
--------------------------------------------------------------------------------
Max. delay selected by single Ctrl. Bit 
--------------------------------------------------------------------------------
					16    32    16    8     4     2     1
--------------------------------------------------------------------------------

43. Author

Bernhard Schwall
eMail: schwall@athene.informatik.uni-bonn.de
